1. Technical Field
Embodiments of the present disclosure generally relate to semiconductor devices, and more particularly to semiconductor devices including a control signal generator and an internal refresh signal generator.
2. Related Art
In the electronics industry, highly integrated fast volatile memory devices such as high performance dynamic random access memory (DRAM) devices widely used as memory devices are increasingly in demand with the development of higher performance electronic systems such as personal computers or communication systems. In particular, when semiconductor devices such as the DRAM devices are employed in cellular phones or notebook computers, the semiconductor devices have to be designed to have an excellent low power consumption characteristic. Accordingly, a lot of efforts have been focused on reduction of an operating current and a standby current of the semiconductor devices.
A data retention characteristic of a DRAM cell including a single transistor and a single storage capacitor may be very sensitive to a temperature. Thus, it may be necessary to control operation conditions of internal circuit blocks in a semiconductor integrated circuit according to variation of circumferential temperature. For example, DRAM devices employed in mobile systems may be designed to control a refresh cycle time according to variation of circumferential temperature. Temperature sensors such as digital temperature sensor regulators (DTSRs) or analog temperature sensor regulators (ATSRs) have been widely used to control the operation conditions of semiconductor devices such as DRAM devices according to variation of circumferential temperature. These temperature sensors may detect a relatively high temperature and may control an operation cycle time to reduce power consumption in a self-refresh mode. Further, the temperature sensors may monitor a circumferential temperature in a normal operation mode.
Meanwhile, the joint electron device engineering council (JEDEC) regulates a normal mode and an extended mode that control an operation cycle time (i.e., a refresh cycle time) of the semiconductor devices using a mode register set (MRS) in a refresh mode. The refresh cycle time of the semiconductor devices may be set to be reduced in the normal mode and may be set to be increased in the extended mode.